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SERIAL CONTROL MODULE: UART
UART Baud Rate Divisor LSB
406 Hardware Reference NS9215
Register bit
assignment
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UART Baud Rate Divisor LSB
Address: 9001_1100 / 9001_9100 / 9002_1100 / 9002_9100, DLAB = 1
UART Baud Rate Divisor sets bits 07:00 of the baud rate generator divisor.
Register
Register bit
assignment
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UART Baud Rate Divisor MSB
Address: 9001_1104 / 9001_9104 / 9002_1104 / 9002_9104, DLAB = 1
UART Baud Rate Divisor sets bits 15:08 of the baud rate generator divisor.
Bits Access Mnemonic Reset Description
D31:08 N/A Reserved N/A N/A
D07:00 W TBUFF 0 Transmitter data bits
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved
Reserved
BRDL
Bits Access Mnemonic Reset Description
D31:08 N/A Reserved N/A N/A
D07:00 R/W BRDL 0x1 Bits 07:00 of the baud rate generator divisor