Digi NS9215 Computer Hardware User Manual


 
EXTERNAL DMA
DMA buffer descriptor
340 Hardware Reference NS9215
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DMA buffer descriptor
All DMA channels use a buffer descriptor. When a DMA channel is activated, it reads
the DMA buffer descriptor that the Buffer Descriptor Pointer register points to. A
DMA buffer descriptor is always fetched using an AHB INCR4 transaction to maximize
AHB bus bandwidth. When the current descriptor is retired, the next descriptor is
accessed from a circular buffer.
Each DMA buffer requires four 32-bit words to describe a transfer. Multiple buffer
descriptors are located in circular buffers of 4096 bytes. The DMA channel’s buffer
descriptor pointer provides the first buffer descriptor address. Subsequent buffer
descriptors are found adjacent to the first descriptor. The final buffer descriptor is
defined with its W bit set. When the DMA channel finds the W bit, the channel
wraps around to the first descriptor.
Each DMA channel can address a maximum of 256 buffer descriptors.
Important:
A DMA channel configured for more than the maximum number of
buffer descriptors operates in an unpredictable fashion.
DMA buffer
descriptor
diagram
Field descriptions follow.
Source address
[pointer]
The source address pointer field identifies the starting location of the source data.
The source address can be aligned to any byte boundary.
Note:
Optimal performance is achieved when the source address is aligned on a
word boundary.
Buffer length Buffer length indicates the number of bytes to move between the source and the
destination. After completing the transfer, the DMA controller updates this field with
the actual number of bytes moved. This is useful for debugging error conditions or
determining the number of bytes transferred before the DONE signal was asserted.
Destination
address [pointer]
The description address pointer field identifies the starting location of the source
data’s destination; that is, to where the source data needs to be moved. The
destination address can be aligned to any byte boundary.
Destination address
Buffer length
Status
Source address
8
FILW Reserved
Reserved
31 30 29 28 16 15 0
OFFSET + 0
OFFSET + C
OFFSET +
OFFSET + 4