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WORKING WITH THE CPU
Fault checking sequence
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The conditions that generate each of the faults are discussed in the following
sections.
Alignment faults If alignment fault checking is enabled (the A bit in the R1: Control register is set;
see "R1: Control register," beginning on page 88), the MMU generates an alignment
fault on any data word access if the address is not word-aligned, or on any halfword
access if the address is not halfword-aligned — irrespective of whether the MMU is
enabled. An alignment fault is not generated on any instruction fetch or byte
access.
Modified virtual address
Check address alignment
Get page
table entry
Get first-level descriptor
Section Page
Check domain status
Section Page
Client (01) Client (01)
Check
access
permissions
Check
access
permissions
Physical address
Manager
(11)
Misaligned
Alignment
fault
Violation
Page
translation
fault
Page
domain
fault
Page
permission
fault
Invalid
No access (00)
Reserved (10)
Invalid
No access (00)
Reserved (10)
Section
domain
fault
Section
permission
fault
Violation
Section
translation
fault