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SYSTEM CONTROL MODULE
System Memory Chip Select 0 Static Memory Base and Mask registers
194 Hardware Reference NS9215
Registers
Register bit
assignment
System Memory Chip Select 0 Static Memory Base and Mask
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
registers
Addresses: A090 01F0 / 01F4
These control registers set the base and mask for system memory chip select 0, with
a minimum size of 4K. The powerup default settings produce a memory range of
0x4000 0000 — 0x4FFF FFFF.
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Chip select 3 base (CS3B)
ReservedChip select 3 base (CS3B)
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Chip select 3 mask (CS3M)
ReservedChip select 3 mask (CS3M) CSD3
Bits Access Mnemonic Reset Description
D31:12 R/W CS3B 0x30000 Chip select 3 base
Base address for chip select 3
D11:00 N/A Reserved N/A N/A
D31:12 R/W CS3M 0xF0000 Chip select 3 mask
Mask or size for chip select 3
D11:01 N/A Reserved N/A N/A
D00 R/W CSD3 0x1 Chip select 3 disable
0 Disable chip select
1 Enable chip select