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SERIAL CONTROL MODULE: SPI
SPI timing characteristics
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2 The numbers shown here are for a 7.5 Mhz SPI slave interface clock rate.
3 The numbers shown here are for a 300 Mhz PLL output frequency. This value
must be proportionally increased with a PLL output frequency decrease.
4 This parameter does not depend on any clock frequency.
SPI slave timing
diagram
Mode3
S11
Mode0
CS#
SDI
CLK
SDO
S12 S13
S15S14
S19S18
S17S16