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Hardware Reference Manual 165
Intel
®
IXP2800 Network Processor
Intel XScale
®
Core
Mode 4 Read Interface Protocol
Figure 55 shows a single read transaction launched from the IXP2800 Network Processor to the
Intel and AMCC* SONET/SDH device, followed by two consecutive writes.
Similarly, the access time is much better than the Lucent* TDAT042G5. The access time is about
eight clock cycles or 160 ns. Here, we need an intervened cycle at the back. Therefore, the
throughput is 11.2 Mbytes per second.
Figure 55. Mode 4 Single Read Transfer (B0)
B1757-07
SP_CLK
SP_ALE_L
SP_CS_L[1]/CSB
SP_WR_L/RWB
SP_RD_L/E
20 4 6 8 10 12 14 16 18 20 22 24 26
SP_AD[7:0]
SP_ACK_L/INT
SP_CP
SP_OE_L
A[10:1] A[10:1]
SP_DIR
ADDR[15:0]
DATA[15:0]
A
[15:8]
A
[7:0]
D[15:8] D[7:0]
A
[7:0]
D
[7:0]
A
[7:0]
D[15:0] D[15:0] 2xD[15:8]
A
[15:8]
A
[7:0]
D
[7:0]
A
[7:0]
D[15:8]
D[15:0]
D
[7:0]