Filter
Top Products
424 Hardware Reference Manual
Intel
®
IXP2800 Network Processor
Performance Monitor Unit
11.4.6.29 DRAM DPSA Events Target ID(010011) / Design Block #(0011)
9 d2_deq_id_wph P_CLK single separate Dequeue d2 cmd
10 dram_req_rph[2] P_CLK single separate d2 has a valid req
11 next_d2_full_wph P_CLK single separate d2 FIFO hit the full threshold
12 cr0_enq_id_wph P_CLK single separate Enqueue cr0 cmd
13 cr0_deq_id_wph P_CLK single separate Dequeue cr0 cmd
14 dram_req_rph[3] P_CLK single separate cr0 has a valid req
15 next_cr0_full_wph P_CLK single separate cr0 FIFO hit the full threshold
16 cr1_enq_id_wph P_CLK single separate Enqueue cr1 cmd
17 cr1_deq_id_wph P_CLK single separate Dequeue cr1 cmd
18 dram_req_rph[4] P_CLK single separate cr1 has a valid req
19 next_cr1_full_wph P_CLK single separate cr1 FIFO hit the full threshold
Table 182. IXP2800 Network Processor Dram DPLA PMU Event List (Sheet 2 of 2)
Table 183. IXP2800 Network Processor Dram DPSA PMU Event List (Sheet 1 of 2)
Event
Number
Event Name
Clock
Domain
Single
pulse/
Long
pulse
Burst Description
0 d0_enq_id_wph P_CLK single separate Enqueue d0 cmd/data
1 d0_deq_id_wph P_CLK single separate Dequeue d0 cmd/data
2 dram_req_rph[0] P_CLK single separate d0 has a valid req(not empty)
3 next_d0_full_wph P_CLK single separate d0 FIFO hit the full threshold
4 d1_enq_id_wph P_CLK single separate Enqueue d1 cmd/data
5 d1_deq_id_wph P_CLK single separate Dequeue d1 cmd/data
6 dram_req_rph[1] P_CLK single separate d1 has a valid req
7 next_d1_full_wph P_CLK single separate d1 FIFO hit the full threshold
8 d2_enq_id_wph P_CLK single separate Enqueue d2 cmd/data
9 d2_deq_id_wph P_CLK single separate Dequeue d2 cmd/data
10 dram_req_rph[2] P_CLK single separate d2 has a valid req
11 next_d2_full_wph P_CLK single separate d2 FIFO hit the full threshold
12 cr0_enq_id_wph P_CLK single separate Enqueue cr0 cmd/data
13 cr0_deq_id_wph P_CLK single separate Dequeue cr0 cmd/data
14 dram_req_rph[3] P_CLK single separate cr0 has a valid req
15 next_cr0_full_wph P_CLK single separate cr0 FIFO hit the full threshold
16 cr1_enq_id_wph P_CLK single separate Enqueue cr1 cmd/data