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392 Hardware Reference Manual
Intel
®
IXP2800 Network Processor
Performance Monitor Unit
70 TURNA3_8_P APB_CLK single separate
It enters the turnaround state of the transaction when
the state machine 3 is active for the mode 3 of
Slowport.
71 IDLE4_0_P APB_CLK single separate
It displays the idle state of the state machine 4 for the
mode 4 of Slowport.
72 START4_1_P APB_CLK single separate
It enters the start state of the state machine 4 for the
mode 4 of Slowport.
73 ADDR14_3_P APB_CLK single separate
It enters the first address state, AD[7:0], of the state
machine 4 for the mode 4 of Slowport.
74 ADDR24_2_P APB_CLK single separate
It enters the second address state, AD[15:8], of the
state machine 4 for the mode 4 of Slowport.
75 ADDR34_6_P APB_CLK single separate
It enters the second address state, AD[23:16], of the
state machine 4 for the mode 4 of Slowport.
76 ADDR44_7_P APB_CLK single separate
It enters the second address state, AD[24], of the
state machine 4 for the mode 4 of Slowport.
77 WRDATA4_5_P APB_CLK single separate
It unpacks the data from the APB onto the Slowport
bus for the state machine 4 for the mode 4 of
Slowport.
78 SETUP4_4_P APB_CLK single separate
It enters the pulse width of the data transaction cycle
for the state machine 4 for the mode 4 of Slowport.
79 PULW4_C_P APB_CLK single separate
It enters the pulse width of the data transaction cycle
for the state machine 4 for the mode 4 of Slowport.
80 HOLD4_E_P APB_CLK single separate
It enters the data hold period for the state machine 4
for the mode 4 of Slowport.
81 OUTEN4_F_P APB_CLK single separate
It starts to assert the OE when the state machine 4 is
active for the mode 4 of Slowport.
82 PKDATA4_D_P APB_CLK single separate
It enters the read data packing state during the active
state machine 4 for the mode 4 of Slowport.
83 LADATA4_B_P APB_CLK single separate
It enters the data capturing cycle during the active
state machine 4 for the mode 4 of Slowport.
84 READY4_9_P APB_CLK single separate
It enters the acknowledge state to terminate the read
cycle when the state machine 4 is active for the mode
4 of Slowport.
85 TURNA4_8_P APB_CLK single separate
It enters the turnaround state of the transaction when
the state machine 4 is active for the mode 4 of
Slowport.
Table 155. XPI PMU Event List (Sheet 4 of 4)