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Hardware Reference Manual 401
Intel
®
IXP2800 Network Processor
Performance Monitor Unit
115 FCE receive active MR_CLK level separate
Indicates a valid Flow Control Packet
received on the RX_DATA bus and may be
used to measure bus utilization; the active
signal from the MR_CLK domain is
synchronized; as such, it yields an
approximate value.
116 CSIX DATA transmit active MT_CLK level separate
Indicates valid transmit data on the
TX_DATA bus and may be used to measure
bus utilization; the valid signal from the
MT_CLK domain is synchronized; as such, it
yields an approximate value.
117
CSIX CONTROL
transmit active
MT_CLK level separate
Indicates valid transmit data on the
TX_DATA bus and may be used to measure
bus utilization; the valid signal from the
MT_CLK domain is synchronized; as such, it
yields an approximate value.
118 SPI-4 transmit active MT_CLK level separate
Indicates valid transmit data on the
TX_DATA bus and may be used to measure
bus utilization; the valid signal from the
MT_CLK domain is synchronized; as such, it
yields an approximate value.
119 FCE transmit active MTX_CLK level separate
Indicates valid transmit data on the
TXC_DATA bus and may be used to
measure bus utilization; the valid signal from
the MTX_CLK domain is synchronized; as
such, it yields an approximate value.
120 FCI receive active MRX_CLK level separate
Indicates a valid Flow Control Packet
received on the RXC_DATA bus and may be
used to measure bus utilization; the active
signal from the MRX_CLK domain is
synchronized; as such, it yields an
approximate value.
121 Receive FIFO error MR_CLK pulse separate
The receive FIFO has experienced an
underflow or overflow. A pulse from the
MR_CLK clock domain is converted to a
pulse in the P_CLK clock domain.
122 reserved
123 reserved
124 reserved
125 reserved
126 reserved
127 reserved
Table 157. IXP2800 Network Processor MSF PMU Event List (Sheet 6 of 6)