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358 Hardware Reference Manual
Intel
®
IXP2800 Network Processor
PCI Unit
Table 146. PCI I/O Cycles with Data Swap Enable
Stepping Description
A Stepping
A PCI IO cycle is treated like CSR where the data bytes are not swapped. It is sent in
the same byte order whether the PCI bus is configured in Big-Endian or Little-Endian
mode.
B Stepping
When PCI_CONTROL[IEE] is 0, PCI data is sent in the same byte order whether the
PCI bus is configured in Big-Endian or Little-Endian mode.
When PCI_CONTROL[IEE] is 1, PCI IO data will follow the same memory space
swapping rule. The address always follows the physical location, Example:
BEs not Swapped (1 byte access) BEs Swapped (1 byte access)
ad[1:0] BE3 BE2 BE1 BE0 ad[1:0] BE3 BE2 BE1 BE0
00 1 1 1 0
11 0 1 1 1
01 1 1 0 1
10 1 0 1 1
10 1 0 1 1
01 1 1 0 1
11 0 1 1 1
00 1 1 1 0
BEs not Swapped (2 byte access) BEs Swapped (2 byte access)
ad[1:0] BE3 BE2 BE1 BE0 ad[1:0] BE3 BE2 BE1 BE0
00 1 1 0 0
10 0 0 1 1
01 1 0 0 1
01 1 0 0 1
10 0 0 1 1
00 1 1 0 0
BEs not Swapped (3 byte access) BEs Swapped (3 byte access)
ad[1:0] BE3 BE2 BE1 BE0 ad[1:0] BE3 BE2 BE1 BE0
00 1 0 0 0
01 0 0 0 1
01 0 0 0 1
00 1 0 0 0
BEs not Swapped (4 byte access) BEs Swapped (4 byte access)
ad[1:0] BE3 BE2 BE1 BE0 ad[1:0] BE3 BE2 BE1 BE0
00 0 0 0 0
00 0 0 0 0