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320 Hardware Reference Manual
Intel
®
IXP2800 Network Processor
PCI Unit
Figure 118. PCI Functional Blocks
A9765-01
Initiator
Address FIFO
Initiator
Read FIFO
Initiator
Write FIFO
Target
Read FIFO
Target
Write FIFO
Target
Address FIFO
PCI
Configuration
PCI Bus
Host Functions
64-bit PCI Bus
(@ 33 / 66 MHz)
Core Interface
PCI UNIT
Master
Address
Register
DMA SRAM
Interface
DMA
Rad/Write Buffer
Pull
SRAM
Push
Bus
Command
Bus
32
Direct
Interface
Direct
Buffer
Slave
Interface
Slave
Write
Buffer
Slave
Address
Register
PCI
CSRs
Master Interface
Slave
Interface
FIFO Bus
(FBUS)
Command Bus Slave
DMA DRAM
Interface
9132
Command
Bus
91
Pull
SRAM BUS DRAM BUS
32
Push
32
Pull
64
Push
64
Command Bus Master
DRAM Data
Interface
SRAM Data
Interface
Address
Interace