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Hardware Reference Manual 337
Intel
®
IXP2800 Network Processor
PCI Unit
The doorbell interrupts are controlled through the registers shown in Table 124.
The Intel XScale
®
core and PCI devices write to the corresponding DOORBELL register to
generate up to 32 doorbell interrupts. Each bit in the DOORBELL register is implemented as an SR
flip-flop. The Intel XScale
®
core writes a 1 to set the flip-flop and the PCI device writes a 1 to clear
the flip-flop. Writing a 0 has no effect on the registers. The PCI interrupt signal is the output of an
NOR functions of all the PCI DOORBELL register bits (outputs of the SR flip-flops). The Intel
XScale
®
core interrupt signal is the output of an NAND function of all the Intel XScale
®
core
DOORBELL register bits (outputs of the SR flip-flops).
To assert an interrupt (i.e., to “push a doorbell”):
• A write of 1 to the corresponding bit of the DOORBELL register generates an interrupt. This
is the case for either PCI device or the Intel XScale
®
core, since writing 1 changes the doorbell
bit to the proper asserted state (i.e., 0 for an Intel XScale
®
core interrupt and 1 for a PCI
interrupt).
To dismiss an interrupt:
• A write of 1 to the corresponding bit of the DOORBELL register clears an interrupt. This is
the case for either PCI device or the Intel XScale
®
core, since writing 1 changes the doorbell
bit to the proper de-asserted state (i.e., 1 for an Intel XScale
®
core interrupt and 0 for a PCI
interrupt).
Figure 124 and Figure 125 illustrate how a Doorbell interrupt is asserted and cleared by both the
Intel XScale
®
core and a PCI device.
Table 124. Doorbell Interrupt Registers
Register Name Description
Intel XScale
®
core
Doorbell
Used to generate the Intel XScale
®
core Doorbell interrupts.
Intel XScale
®
core
Doorbell Setup
Used to initialize the Intel XScale
®
core Doorbell register and for diagnostics.
PCI Doorbell Used to generate the PCI Doorbell interrupts.
PCI Doorbell Setup Used to initialize the PCI Doorbell register and for diagnostics.
Figure 124. Generation of the Doorbell Interrupts to PCI
A9771-01
1. Write 1 to set bit and
Generate a PCI interrupt.
2. PCI Reads PCI_DOORBELL to
determine the Mailbox interrupt
(e.g., reads 0x8000 0300).
3. PCI Writes back read value to
clear interrupt.
(e.g., write 0x8000 03000).
PCI_INT#
DOORBELL
Register
R
S
Q
D