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User’s Manual
Preliminary PPC440x5 CPU Core
intrupts.fm.
September 12, 2002
Page 203 of 589
Only applies to the defined 64-bit load, store, and cache management instructions, which are not recog-
nized by the PPC440x5 core.
5. Program (Privileged Instruction)
Only applies to the dcbi instruction, and only occurs if MSR[PR]=1.
6. Data TLB Error (Data TLB Miss exception)
7. Data Storage (all exception types except Byte Ordering exception)
8. Alignment (Alignment exception)
9. Debug (DAC or DVC exception)
10. Debug (ICMP exception)
6.7.2 Exception Priorities for Floating-Point Load and Store Instructions
The following list identifies the priority order of the exception types that may occur within the PPC440x5 core
as the result of the attempted execution of any floating-point load or store instruction.
1. Debug (IAC exception)
2. Instruction TLB Error (Instruction TLB Miss exception)
3. Instruction Storage (Execute Access Control exception)
4. Program (Illegal Instruction exception)
This exception will occur if no floating-point unit is attached to the PPC440x5 core, or if the particular
floating-point load or store instruction is not recognized by the attached floating-point unit.
5. Floating-Point Unavailable (Floating-Point Unavailable exception)
This exception will occur if an attached floating-point unit recognizes the instruction, but floating-point
instruction processing is disabled (MSR[FP]=0).
6. Program (Unimplemented Operation exception)
This exception will occur if an attached floating-point unit recognizes but does not support the instruction,
and floating-point instruction processing is enabled (MSR[FP]=1).
7. Data TLB Error (Data TLB Miss exception)
8. Data Storage (all exception types except Cache Locking exception)
9. Alignment (Alignment exception)
10. Debug (DAC or DVC exception)
11. Debug (ICMP exception)
6.7.3 Exception Priorities for Allocated Load and Store Instructions
The following list identifies the priority order of the exception types that may occur within the PPC440x5 core
as the result of the attempted execution of any allocated load or store instruction.
1. Debug (IAC exception)
2. Instruction TLB Error (Instruction TLB Miss exception)
3. Instruction Storage (Execute Access Control exception)