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Preliminary PPC440x5 CPU Core User’s Manual
instrset.fm.
September 12, 2002 Page 249 of 589
9. Instruction Set
Descriptions of the PPC440x5 instructions follow. Each description contains the following elements:
• Instruction names (mnemonic and full)
• Instruction syntax
• Instruction format diagram
• Pseudocode description
• Prose description
• Registers altered
Where appropriate, instruction descriptions list invalid instruction forms and exceptions, and provide
programming notes.
Table 9-1 summarizes the PPC440x5 instruction set by category.
Table 9-1. Instruction Categories
Category Sub-Category Instruction Types
Integer
Integer Storage Access load, store
Integer Arithmetic add, subtract, multiply, divide, negate
Integer Logical
and, andc, or, orc, xor, nand, nor, xnor, extend sign, count lead-
ing zeros
Integer Compare compare, compare logical
Integer Trap trap
Integer Rotate rotate and insert, rotate and mask
Integer Shift shift left, shift right, shift right algebraic
Integer Select select operand
Branch
branch, branch conditional, branch to link, branch to count
Processor Control
Condition Register Logical crand, crandc, cror, crorc, crnand, crnor, crxor, crxnor
Register Management
move to/from SPR, move to/from DCR, move to/from MSR,
write to external interrupt enable bit, move to/from CR
System Linkage
system call, return from interrupt, return from critical interrupt,
return from machine check interrupt
Processor Synchronization instruction synchronize
Storage Control
Cache Management
data allocate, data invalidate, data touch, data zero, data flush,
data store, instruction invalidate, instruction touch
TLB Management read, write, search, synchronize
Storage Synchronization memory synchronize, memory barrier
Allocated
Allocated Arithmetic
multiply-accumulate, negative multiply-accumulate, multiply
halfword
Allocated Logical detect left-most zero byte
Allocated Cache Management
data congruence-class invalidate, instruction congruence-class
invalidate
Allocated Cache Debug data read, instruction read