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sthx
Store Halfword Indexed
Preliminary PPC440x5 CPU Core User’s Manual
instrset.fm.
September 12, 2002 Page 417 of 589
sthx
Store Halfword Indexed
EA ← (RA|0) + (RB)
MS(EA, 2)
← (RS)
16:31
An effective address (EA) is formed by adding an index to a base address. The index is the contents of
register RB. The base address is 0 when the RA field is 0, and is the contents of register RA otherwise.
The least significant halfword of register RS is stored into the halfword at the EA.
If instruction bit 31 contains 1, the contents of CR[CR0] are undefined.
Registers Altered
• None
Invalid Instruction Forms
• Reserved fields
sthx RS, RA, RB
31 RS RA RB 407
0 6 11 16 21 31