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cmp
Compare
PPC440x5 CPU Core User’s Manual Preliminary
Page 282 of 589
instrset.fm.
September 12, 2002
cmp
Compare
c
0:3
←
4
0
if (RA) < (RB) then c
0
← 1
if (RA) > (RB) then c
1
← 1
if (RA) = (RB) then c
2
← 1
c
3
← XER[SO]
n
← BF
CR[CRn]
← c
0:3
The contents of register RA are compared with the contents of register RB using a 32-bit signed compare.
The CR field specified by the BF field is updated to reflect the results of the compare and the value of
XER[SO] is placed into the same CR field.
If instruction bit 31 contains 1, the contents of CR[CR0] are undefined.
Registers Altered
• CR[CRn] where n is specified by the BF field
Invalid Instruction Forms
• Reserved fields
Programming Note
PowerPC Book-E architecture defines this instruction as cmp BF,L,RA,RB, where L selects operand size for
64-bit implementations. For all 32-bit implementations, L = 0 is required (L = 1 is an invalid form); hence for
the PPC440x5 core, use of the extended mnemonic cmpw BF,RA,RB is recommended.
cmp BF, 0, RA, RB
31 BF RA RB 0
069111621 31
Table 9-11. Extended Mnemonics for cmp
Mnemonic Operands Function
Other Registers
Altered
cmpw
[BF,] RA, RB
Compare Word; use CR0 if BF is omitted.
Extended mnemonic for
cmp BF,0,RA,RB