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dcread
Data Cache Read
Preliminary PPC440x5 CPU Core User’s Manual
instrset.fm.
September 12, 2002 Page 305 of 589
dcread
Data Cache Read
EA ← (RA|0) + (RB)
INDEX
← EA
17:26
WORD ← EA
27:29
(RT) ← (data cache data)[INDEX,WORD]
DCDBTRH
← (data cache tag high)[INDEX]
DCDBTRL
← (data cache tag low)[INDEX]
An effective address (EA) is formed by adding an index to a base address. The index is the contents of
register RB. The base address is 0 if the RA field is 0 and is the contents of register RA otherwise.
EA
17:26
selects a line of tag and data from the data cache. EA
27:29
selects a word from the 8-word data
portion of the selected cache line, and this word is read into register RT. EA
30:31
must be 0b00; if not, the
value placed in register RT is undefined.
The tag portion of the selected cache line is read into the DCDBTRH and DCDBTRL registers, as follows:
This instruction can be used by a debug tool to determine the contents of the data cache, without knowing the
specific addresses of the lines which are currently contained within the cache.
If instruction bit 31 contains 1, the contents of CR[CR0] are undefined.
dcread RT, RA, RB
31 RT RA RB 486
0 6 11 16 21 31
Register[bit(s)]
Tag
Field
Name
DCDBTRH[0:23] TRA Tag Real Address
Bits 0:23 of the lower 32 bits of the 36-bit real
address associated with this cache line
DCDBTRH[24] V Valid
The valid indicator for the cache line (1 indi-
cates valid)
DCDBTRH[25:27] reserved Reserved fields are read as 0s
DCDBTRH[28:31] TERA Tag Extended Real Address
Upper 4 bits of the 36-bit real address associ-
ated with this cache line
DCDBTRL[0:23] reserved Reserved fields are read as 0s
DCDBTRL[24:27] D Dirty Indicators
The “dirty” (modified) indicators for each of the
four doublewords in the cache line
DCDBTRL[28] U0 U0 Storage Attribute
The U0 storage attribute for the memory page
associated with this cache line
DCDBTRL[29] U1 U1 Storage Attribute
The U0 storage attribute for the memory page
associated with this cache line
DCDBTRL[30] U2 U2 Storage Attribute
The U0 storage attribute for the memory page
associated with this cache line
DCDBTRL[31] U3 U3 Storage Attribute
The U0 storage attribute for the memory page
associated with this cache line