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User’s Manual
Preliminary PPC440x5 CPU Core
prgmodel.fm.
September 12, 2002
Page 43 of 589
• The ordering that assigns the lowest address to the highest-order (“left-most”) eight bits of the scalar, the
next sequential address to the next-highest-order eight bits, and so on.
This ordering is called big endian because the “big end” (most-significant end) of the scalar, considered
as a binary number, comes first in storage. IBM RISC System/6000, IBM System/390, and Motorola
680x0 are examples of computer architectures using this byte ordering.
• The ordering that assigns the lowest address to the lowest-order (“right-most”) eight bits of the scalar, the
next sequential address to the next-lowest-order eight bits, and so on.
This ordering is called little endian because the “little end” (least-significant end) of the scalar, considered
as a binary number, comes first in storage. The Intel x86 is an example of a processor architecture using
this byte ordering.
PowerPC Book-E supports both big endian and little endian byte ordering, for both instruction and data
storage accesses. Which byte ordering is used is controlled on a memory page basis by the endian (E)
storage attribute, which is a field within the TLB entry for the page. The endian storage attribute is set to 0 for
a big endian page, and is set to 1 for a little endian page. See Memory Management on page 133 for more
information on memory pages, the TLB, and storage attributes, including the endian storage attribute.
2.1.3.1 Structure Mapping Examples
The following C language structure, s, contains an assortment of scalars and a character string. The
comments show the value assumed to be in each structure element; these values show how the bytes
comprising each structure element are mapped into storage.
struct {
int a; /* 0x1112_1314 word */
long long b; /* 0x2122_2324_2526_2728 doubleword */
char *c; /* 0x3132_3334 word */
char d[7]; /* 'A','B','C','D','E','F','G' array of bytes */
short e; /* 0x5152 halfword */
int f; /* 0x6162_6364 word */
} s;
C structure mapping rules permit the use of padding (skipped bytes) to align scalars on desirable boundaries.
The structure mapping examples below show each scalar aligned at its natural boundary. This alignment
introduces padding of four bytes between a and b, one byte between d and e, and two bytes between e and
f. The same amount of padding is present in both big endian and little endian mappings.