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User’s Manual
PPC440x5 CPU Core Preliminary
Page 204 of 589
intrupts.fm.
September 12, 2002
4. Program (Illegal Instruction exception)
This exception will occur if no auxiliary processor unit is attached to the PPC440x5 core, or if the particu-
lar allocated load or store instruction is not recognized by the attached auxiliary processor.
5. Program (Privileged Instruction exception)
This exception will occur if an attached auxiliary processor unit recognizes the instruction and indicates
that the instruction is privileged, but MSR[PR]=1.
6. Auxiliary Processor Unavailable (Auxiliary Processor Unavailable exception)
This exception will occur if an attached auxiliary processor recognizes the instruction, but indicates that
auxiliary processor instruction processing is disabled (whether or not auxiliary processor instruction pro-
cessing is enabled is implementation-dependent).
7. Program (Unimplemented Operation exception)
This exception will occur if an attached auxiliary processor recognizes but does not support the instruc-
tion, and also indicates that auxiliary processor instruction processing is enabled (whether or not auxiliary
processor instruction processing is enabled is implementation-dependent).
8. Data TLB Error (Data TLB Miss exception)
9. Data Storage (all exception types except Cache Locking exception)
10. Alignment (Alignment exception)
11. Debug (DAC or DVC exception)
12. Debug (ICMP exception)
6.7.4 Exception Priorities for Floating-Point Instructions (Other)
The following list identifies the priority order of the exception types that may occur within the PPC440x5 core
as the result of the attempted execution of any floating-point instruction other than a load or store.
1. Debug (IAC exception)
2. Instruction TLB Error (Instruction TLB Miss exception)
3. Instruction Storage (Execute Access Control exception)
4. Program (Illegal Instruction exception)
This exception will occur if no floating-point unit is attached to the PPC440x5 core, or if the particular
floating-point instruction is not recognized by the attached floating-point unit.
5. Floating-Point Unavailable (Floating-Point Unavailable exception)
This exception will occur if an attached floating-point unit recognizes the instruction, but floating-point
instruction processing is disabled (MSR[FP]=0).
6. Program (Unimplemented Operation exception)
This exception will occur if an attached floating-point unit recognizes but does not support the instruction,
and floating-point instruction processing is enabled (MSR[FP]=1).
7. Program (Floating-Point Enabled exception)