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DBCR1 (cont.)
Debug Control Register 1
PPC440x5 CPU Core User’s Manual Preliminary
Page 472 of 589
regsumm440core.fm.
September 12, 2002
20:21 IAC4US
IAC 4 User/Supervisor
00 Both
01 Reserved
10 Supervisor only (MSR[PR] = 0)
11 User only (MSR[PR] = 1)
22:23 IAC4ER
IAC 4 Effective/Real
00 Effective (MSR[IS] = don’t care)
01 Reserved
10 Virtual (MSR[IS] = 0)
11 Virtual (MSR[IS] = 1)
24:25 IAC34M
IAC 3/4 Mode
00 Exact match
01 Reserved
10 Range inclusive
11 Range exclusive
Match if address[0:29] = IAC 3/4[0:29]; two inde-
pendent compares
Match if IAC3
≤ address < IAC4
Match if address < IAC3 OR address ≥ IAC4
26:30 Reserved
31 IAC34AT
IAC3/4 Auto-Toggle Enable
0 Disable IAC 3/4 auto-toggle
1 Enable IAC 3/4 auto-toggle