SRR0
Save/Restore Register 0
Preliminary PPC440x5 CPU Core User’s Manual
regsumm440core.fm.
September 12, 2002 Page 511 of 589
SRR0
SPR 0x01A Supervisor R/W
See Save/Restore Register 0 (SRR0) on page 167.
Figure 10-43. Save/Restore Register 0 (SRR0)
0:29 Return address for non-critical interrupts
30:31 Reserved
0 29 30 31