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ICDBTRL
Instruction Cache Debug Tag Register Low
Preliminary PPC440x5 CPU Core User’s Manual
regsumm440core.fm.
September 12, 2002 Page 493 of 589
ICDBTRL
SPR 0x39E Supervisor Read-Only
See icread Operation on page 112.
Figure 10-27. Instruction Cache Debug Tag Register Low (ICDBTRL)
0:21 Reserved
22 TS Translation Space
The address space portion of the virtual address
associated with the cache line read by icread.
23 TD
Translation ID (TID) Disable
0 TID enable
1 TID disable
TID Disable field for the memory page associated
with the cache line read by icread.
24:31 TID Translation ID
TID field portion of the virtual address associated
with the cache line read by icread.
0 21 22 23 24 31
TS
TD
TID