Filter
Top Products
lhzu
Load Halfword and Zero with Update
Preliminary PPC440x5 CPU Core User’s Manual
instrset.fm.
September 12, 2002 Page 331 of 589
lhzu
Load Halfword and Zero with Update
EA ← (RA|0) + EXTS(D)
(RA)
← EA
(RT)
←
16
0 || MS(EA,2)
An effective address (EA) is formed by adding a displacement to a base address. The displacement is
obtained by sign-extending the 16-bit D field to 32 bits. The base address is 0 if the RA field is 0 and is the
contents of register RA otherwise. The EA is placed into register RA.
The halfword at the EA is extended to 32 bits by concatenating 16 0-bits to its left. The result is placed into
register RT.
Registers Altered
•RA
•RT
Invalid Instruction Forms
•RA=RT
•RA=0
lhzu RT, D(RA)
41 RT RA D
0 6 11 16 31