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User’s Manual
PPC440x5 CPU Core Preliminary
Page 208 of 589
intrupts.fm.
September 12, 2002
4. Program (Illegal Instruction exception)
Applies to all reserved instruction opcodes except the reserved-nop instruction opcodes.
5. Debug (ICMP exception)
Only applies to the reserved-nop instruction opcodes.
6.7.13 Exception Priorities for All Other Instructions
The following list identifies the priority order of the exception types that may occur within the PPC440x5 core
as the result of the attempted execution of all other instructions (that is, those not covered by one of the
sections 6.7.1 through 6.7.12). This includes both defined instructions and allocated instructions implemented
within the PPC440x5 core.
1. Debug (IAC exception)
2. Instruction TLB Error (Instruction TLB Miss exception)
3. Instruction Storage (Execute Access Control exception)
4. Program (Illegal Instruction exception)
Applies only to the defined 64-bit instructions, as these are not implemented within the PPC440x5 core.
5. Debug (ICMP exception)
Does not apply to the defined 64-bit instructions, as these are not implemented by the PPC440x5 core.