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lwbrx
Load Word Byte-Reverse Indexed
PPC440x5 CPU Core User’s Manual Preliminary
Page 340 of 589
instrset.fm.
September 12, 2002
lwbrx
Load Word Byte-Reverse Indexed
EA ← (RA|0) + (RB)
(RT)
← BYTE_REVERSE(MS(EA,4))
An effective address (EA) is formed by adding an index to a base address. The index is the contents of
register RB. The base address is 0 if the RA field is 0 and is the contents of register RA otherwise.
The word at the EA is byte-reversed from the default byte ordering for the memory page referenced by the
EA. The result is placed into register RT.
If instruction bit 31 contains 1, the contents of CR[CR0] are undefined.
Registers Altered
•RT
Invalid Instruction Forms
• Reserved fields
Programming Note
Byte ordering is generally controlled by the Endian (E) storage attribute (see Memory Management on
page 133). The load byte reverse instructions provide a mechanism for data to be loaded from a memory
page using the opposite byte ordering from that specified by the Endian storage attribute.
lwbrx RT, RA, RB
31 RT RA RB 534
0 6 11 16 21 31