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lswx
Load String Word Indexed
PPC440x5 CPU Core User’s Manual Preliminary
Page 338 of 589
instrset.fm.
September 12, 2002
Programming Note
This instruction can be restarted, meaning that it could be interrupted after having already updated some of
the target registers, and then re-executed from the beginning (after returning from the interrupt), in which
case the registers which had already been loaded prior to the interrupt will be loaded a second time. Note that
if RA or RB is in the range of registers to be loaded (an invalid form; see above) and is also one of the regis-
ters which is loaded prior to the interrupt, then when the instruction is restarted the re-calculated EA will be
incorrect, since the affected register will no longer contain the original base address or index. Hence the defi-
nition of these as invalid forms which software must avoid.
If XER[TBC] = 0, the contents of register RT are undefined and lswx is treated as a no-op. Furthermore, if the
EA is such that a Data Storage, Data TLB Error, or Data Address Compare Debug exception occurs, lswx is
treated as a no-op and no interrupt occurs as a result of the exception.