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stwbrx
Store Word Byte-Reverse Indexed
Preliminary PPC440x5 CPU Core User’s Manual
instrset.fm.
September 12, 2002 Page 423 of 589
stwbrx
Store Word Byte-Reverse Indexed
EA ← (RA|0) + (RB)
MS(EA, 4)
← BYTE_REVERSE((RS)
0:31
)
An effective address (EA) is formed by adding an index to a base address. The index is the contents of
register RB. The base address is 0 when the RA field is 0 and is the contents of register RA otherwise.
The word in register RS is byte-reversed from the default byte ordering for the memory page referenced by
the EA. The resulting word is stored at the EA.
If instruction bit 31 contains 1, the contents of CR[CR0] are undefined.
Registers Altered
• None
Invalid Instruction Forms
• Reserved fields
Programming Note
Byte ordering is generally controlled by the Endian (E) storage attribute (see Memory Management on
page 133). The store byte reverse instructions provide a mechanism for data to be stored to a memory page
using the opposite byte ordering from that specified by the Endian storage attribute.
stwbrx RS, RA, RB
31 RS RA RB 662
0 6 11 16 21 31