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DBSR (cont.)
Debug Status Register
Preliminary PPC440x5 CPU Core User’s Manual
regsumm440core.fm.
September 12, 2002 Page 477 of 589
13 DAC1W
DAC 1 Write Debug Event
0 Event didn’t occur
1 Event occurred
14 DAC2R
DAC 2 Read Debug Event
0 Event didn’t occur
1 Event occurred
15 DAC2W
DAC 2 Write Debug Event
0 Event didn’t occur
1 Event occurred
16 RET
Return Debug Event
0 Event didn’t occur
1 Event occurred
17:29 Reserved
30 IAC12ATS
IAC 1/2 Auto-Toggle Status
0 Range is not reversed from value specified in
DBCR1[IAC12M]
1 Range is reversed from value specified in
DBCR1[IAC12M]
31 IAC34ATS
IAC 3/4 Auto-Toggle Status
0 Range is not reversed from value specified in
DBCR1[IAC34M]
1 Range is reversed from value specified in
DBCR1[IAC34M]