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TMP92CZ26A
92CZ26A-122
Port 5 register
7 6 5 4 3 2 1 0
bit Symbol P57 P56 P55 P54 P53 P52 P51 P50
Read/Write R/W
After reset 0 0 0 0 0 0 0 0
Port 5 Function register
7 6 5 4 3 2 1 0
bit Symbol P57F P56F P55F P54F P53F P52F P51F P50F
Read/Write W
After reset
Note2:
0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
Function
0:Port 1:Address bus (A8 to A15)
Port 5 Drive register
7 6 5 4 3 2 1 0
bit Symbol P57D P56D P55D P54D P53D P52D P51D P50D
Read/Write
R/W
After reset 1 1 1 1 1 1 1 1
Function Input/Output buffer drive register for standby mode
Note1: Read-modify-write is prohibited for P5FC.
Note2: It is set to “Port” or “Data bus” by AM pins state.
Figure 3.7.6 Register for Port5
P5
(0014H)
P5FC
(0017H)
P5DR
(0085H)