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TMP92CZ26A
92CZ26A-140
Figure 3.7.25 Port F0, F3
Figure 3.7.26 Port F1, F2, F4, F5
Internal data bus
Selector
A
B
S
Selector
A
B
S
PF0 (I2S0CKO)
PF3 (I2S1CKO)
I2S0CKO output
I2S1CKO/X1D4output
PF read
Direction
control
(
on bit basis
)
PFCR write
Function
control
(
on bit basis
)
S
Output latch
PF write
Reset
PFFC write
Internal data bus
Selector
A
B
S
Selector
A
B
S
PF1(I2S0DO)
PF2(I2S0WS)
PF4(I2S1DO)
PF5(I2S1WS)
I2S0DO,I2S1DO output
I2S0WS,I2S1WS output
PF read
Direction
control
(
on bit basis
)
PFCRwrite
Function
control
(
on bit basis
)
S
Output latch
PF write
Reset
PFFC write