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TMP92CZ26A
92CZ26A-699
(6) LCD controller (1/6)
Symbol Name
Address 7 6 5 4 3 2 1 0
RAMTYPE1 RAMTYPE0 SCPW1 SCPW0 MODE3 MODE2 MODE1 MODE0
R/W
0 0 1 1 0 0 0 0
LD bus transfer speed
Mode setting
SCPW2= 0
00: 2-clock
01: 4-clock
10: 8-clock
11: 16-clock
SCPW2= 1
LCD
MODE0
LCD
mode0
register
0280H
Display RAM
00: Internal RAM
01: External SRAM
10: SDRAM
11: Reserved
00: 6-clock
01: 12-clock
10: 24-clock
11: 48-clock
0000 : Reserved
0001 : SR (mono)
0010 : SR (4Gray)
0011 : Reserved
0100 : SR (16Gray)
0101 : SR (64Gray)
0110 : STN (256 color)
0111 : STN
(4096 color)
1000 : Reserved
1001 : Reserved
1010 : TFT (256 color)
1011 : TFT (4096 color)
1100 : TFT (64k color)
1101 : TFT256k,16M
(color)
1110 : Reserved
1111 : Reserved
LDC2 LDC1 LDC0 LDINV AUTOINV INTMODE FREDGE SCPW2
R/W W W
0 0 0 0 0 0 0 0
Data rotation function
(Supported for 64K-color: 16bps only)
000: Normal
001: Horizontal flip
010: Vertical flip
100: 90-degree
101: Reserved
110: Reserved
111: Reserved
LCD
MODE1
LCD
mode1
register
0281H
011: Horizontal & vertical flip
LD bus
Inversion
0: Normal
1: Inversion
Auto bus
inversion
0: Disable
1: enable
(Valid only
for TFT)
Interrupt
selection
0:LLOAD
1:LVSYNC
FR edge
0: LHSYNC
front edge
1:LHSYNC
back edge
LD bus
transfer
speed
0: normal
1: 1/3
FMP3 FMP2 FMP1 FMP0 FML3 FML2 FML1 FML0
R/W
0
0 0 0 0 0 0 0
LCDDVM0
LCD
divide
frame0
register
0283H
LCP0 DVM (bits 3-0) LHSYNC DVM (bits 3-0)
FMP7 FMP6 FMP5 FMP4 FML7 FML6 FML5 FML4
R/W
0 0 0 0 0 0 0 0
LCDDVM1
LCD
divide
frame1
register
0288H
LCP0 DVM (bits 7-4) LHSYNC DVM (bit 7-4)
COM3 COM2 COM1 COM0 SEG3 SEG2 SEG1 SEG0
R/W R/W
0
0 0 0
0
0 0 0
LCDSIZE
LCD size
register
0284H
Common setting
0000 : reserved 1000 : 320
0001 : 64 1001 : 480
0010 : 96 1010 : Reserved
0011 : 120 1011 : Reserved
0100 : 128 1100 : Reserved
0101 : 160 1101 : Reserved
0110 : 200 1110 : Reserved
0111 : 240 1111 : Reserved
Segment setting
0000 : Reserved 1000 : Reserved
0001 : 64 1001 : Reserved
0010 : 128 1010 : Reserved
0011 : 160 1011 : Reserved
0100 : 240 1100 : Reserved
0101 : 320 1101 : Reserved
0110 : 480 1110 : Reserved
0111 : 640 1111 : Reserved
PIPE ALL0 FRMON – DLS LCP0OC START
R/W R/W
0 0 0 0 0 0 0
LCDCTL0
LCD
control0
register
0285H
PIP
function
0:Disable
1:Enable
Segment
Data
0:Normal
1:
Always
output “0”
FR divide
setting
0: Disable
1: Enable
Always
write “0”
FR signal
LCP0/Line
selection
0:Line
1:LCP0
LCP0
0: Always
output
1: At valid
data only
LLOAD
width
0: At setting
in register
1: At valid
data only
LCDC
operation
0: Stop
1: Start