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TMP92CZ26A
92CZ26A-295
3.13.1 Block diagram
Figure 3.13.1 Block diagram of TMRB0
Internal data bus
Slelector
16-bit comparator
(CP10)
TB0MOD<TB0CLK1:0>
φT1
φT4
φT16
Timer
flip-flop
control
TB0FF0
TB0OUT0
Match
detection
16-bit timer register
TB0RG0H/L
Register buffer 10
TA1OUT
TB1MOD
<TB0CPM1:0>
16-bit time register
TB0RG1H/L
TB0MOD
<TB0CP0I>
16-bit comparator
(CP11)
Capture,
external interrupt
input control
TB0RUN<TB0RUN>
Caputure register 1
TB0CP1H/L
Capture register 0
TB0CP0H/L
Run/
clear
Internal data bus
Match detection
16-bit up counter
(UC10)
Count
clock
(from TMRA01
)
Prescaler
clock
φT0TMR
32 16 8 4 2
φT1 φT4 φT16
TB0RUN
<TB0PRUN>
Internal data bus
TB0MOD<TB0CLE>
Intenal data bus
Time
r
flip-flop
Timer flip-flop
output
Interrupt output
register 0
INTTB00
register 1
INTTB01
TB0RUN
<TB0RDE>
External INT
input INT6
TB0IN0