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TMP92CZ26A
92CZ26A-508
3.19 LCD Controller (LCDC)
The TMP92CZ26A incorporates an LCD controller (LCDC) for controlling an LCD driver
LSI (LCD module). This LCDC supports display sizes from 64 × 64 to 640 × 480 dots for
monochrome, grayscale, and 4096-color display and from 64 × 64 to 320 × 320 dots for color
display using 65536 or more colors. The supported LCD driver (LCD module) types are
STN (Super Twisted Nematic) and digital RGB input TFT (Thin Film Transistor).
• STN support
With LCD drivers supporting STN, an 8-bit data interface is used to realize monochrome,
4-graysale, 16-grayscale, 64-grayscale, 256-color, 4096-color display.
After required settings such as the operation mode, display RAM start address, and LCD
size (common, segment) are made in the I/O registers, the start register is set to enable the
LCDC. The LCDC outputs a bus request to the CPU, reads data from the display RAM,
converts the data as necessary, and writes it to a dedicated FIFO buffer.
• TFT support
With LCD drivers supporting digital RGB input TFT, an 8- to 24-bit data interface is
used to realize 4096-color, 65536-color, 262144-color, and 16777216-color display. The data
transfer method is the same as in the case of STN.
The LCDC controls LCD display operations using 8-bit RGB (R3:G3:B2), 12-bit RGB
(R4:G4:B4), 16-bit RGB (R5:G6:B5), 18-bit RGB (R6:G6:B6), or 24-bit RGB (R8:G8:B8)
display data, the shift clock LCP0 for capturing data, the frame signal LFR, the data load
signal LLOAD, and the LDIV signal for indicating the inversion of data output. The LDIV
signal can be used effectively in reducing noise and power consumption.
The LCDC also has horizontal synchronization signal LHSYNC and vertical
synchronization signal LVSYNC for controlling gate drivers, and three programmable OE
pins for supporting various signals of the TFT driver to be used.