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TMP92CZ26A
92CZ26A-479
3.17.2 SFR
SFR of SPIC are as follows.These area connected to CPU with 16 bit data bus.
(1) SPIMD(SPI Mode setting register)
SPIMD register is for operation mode or clock etc.
SPIMD Register
7 6 5 4 3 2 1 0
bit Symbol
SWRST XEN CLKSEL2 CLKSEL1 CLKSEL0
Read/Write
W R/W R/W
After Reset
0 0 1 0 0
Function
Software
Reset
0: don’t care
1: Reset
SYSCK
0: disable
1: enable
Select Baud Rate(Note1)
000:Reserved 100:f
SYS
/8
001: f
SYS
/2 101: f
SYS
/16
010: f
SYS
/3 110: f
SYS
/64
011: f
SYS
/4 111: f
SYS
/256
15 14 13 12 11 10 9 8
bit Symbol
LOOPBACK
MSB1ST DOSTAT TCPOL RCPOL TDINV RDINV
Read/Write
R/W R/W
After Reset
0 1 1 0 0 0 0
Function
LOOPBACK
Test mode
0:disbale
1:enable
Start bit for
Transmit /
Receive
0:LSB
1:MSB
SPDO pin
state
(no transmit)
0:fixed to ”0”
1:fixed to ”1”
Synchronous
clock edge
during
transmitting
0: fall
1: rise
Synchronous
clock edge
during
receiving
0: fall
1: rise
Invert data
During
transmitting
0: disable
1: enable
Invert data
During
receiving
0: disable
1: enable
Note: Maximum speed of this SD card is 20Mbps in SD card SPI mode.
When setting the baud rates, select less than 20Mbps according to the operation speed of CPU (f
SYS
).
Figure 3.17.2 SPIMD register
(a) <LOOPBACK>
Because Internal SPDO can be input to internal SPDI, it can be used as test.
Set <XEN>=1 and <LOOPBACK>=1, outputs clock from SPCLK pin regardless of
operation of transmit/receive.
Please change the setting when transmitting/receiving is not in operation.
Figure 3.17.3 <LOOPBACK> Function
(b) <MSB1ST>
Select the start bit of transmit/receive data
Please don't change the setting of this register when transmitting/receiving is in
operation.
SPIMD
(820H)
(821H)
Prohibit to
Read
Modify
Write
Y
B
SPDI pin
SPDO pin
Transmitting data
Receiving data
A
SPIMD<LOOPBACK>