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TMP92CZ26A
92CZ26A-176
Port X register
7 6 5 4 3 2 1 0
bit Symbol PX7 PX5 PX4
Read/Write R/W R/W
After reset
Data from external port
(Output latch register is cleared to “0”)
Port W control register
7 6 5 4 3 2 1 0
bit Symbol PX7C PX5C
Read/Write W W
After reset 0 0
Function
0: Input
1: Output
0: Input
1: Output
Port W function register
7 6 5 4 3 2 1 0
bit Symbol PX7F PX5F PX4F
Read/Write W W
After reset 0 0 0
Function
0:Port
1: Reserved
0:Port
1:X1USB
input
0:Port
1:CLKOUT
at <PX4> = 0
LDIV
at <PX4> = 1
Port W drive register
7 6 5 4 3 2 1 0
bit Symbol PXD7 PXD5 PXD4
Read/Write R/W R/W
After reset 1 1 1
Function
Input/Output buffer drive register
for standby mode
Note: Read-Modify-Write is prohibited for the registers PWCR, PWFC.
Figure 3.7.65 Register for Port X
PX
(00B0H)
PXFC
(00B3H)
PXDR
(009FH)
PXCR
(00B2H)