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TMP92CZ26A
92CZ26A-160
Port P register
7 6 5 4 3 2 1 0
bit Symbol PP7 PP6 PP5 PP4 PP3 PP2 PP1
Read/Write R/W
After reset
0 0 Data from external port
(Output latch register is cleared to “0”)
Port P control register
7 6 5 4 3 2 1 0
bit Symbol PP5C PP4C PP3C PP2C PP1C
Read/Write W
After reset 0 0 0 0 0
Function 0: Input 1: Output
Port P function register
7 6 5 4 3 2 1 0
bit Symbol PP7F PP6F PP5F PP4F PP3F PP2F PP1F
Read/Write W
After reset 0 0 0 0 0 0 0
Function 0:Port
1:TB1OUT0
0:Port
1:TB0OUT0
Refer to following table
Port P drive register
7 6 5 4 3 2 1 0
bit Symbol PP7D PP6D PP5D PP4D PP3D PP2D PP1D
Read/Write R/W
After reset 1 1 1 1 1 1 1
Function Input/Output buffer drive register for standby mode
Note1: Read-Modify-Write is prohibited for the registers PPCR, PPFC.
Note2: When setting PP5, PP4, PP3 pins to INT7,INT6,INT5 input, set PPDR<PP5D:3D> to “0000” (prohibit input), and when
driving PP5,PP4,PP3 pins to “0”, execute HALT instruction. This setting generates INT7, INT6, and INT5 inside. If don’t using
external interrupt in HALT condition, set like an interrupt don’t generated.
Figure 3.7.48 Register for Port P
PP
(0060H)
PPFC
(0063H)
PPCR
(0062H)
PPDR
(0098H)
<PP1C>
>
<PP1F>
0 1
0 Input port Output port
1
Don’t setting TA3OUT output
PP1 setting PP2 setting
<PP5C>
<PP5F>
0 1
0 Input port Output port
1 INT7 input TB1IN0 input
PP5 setting
<
<PP3C>
<PP3F>
0 1
0 Input port Output port
1
INT5 input TA7OUT output
PP3 setting
<PP4C>
<PP4F>
0 1
0 Input port Output port
1 INT6 input TB0IN0 input
PP4 setting
<PP2C>
>
<PP2F>
0 1
0 Input port Output port
1
Don’t setting TA5OUT output