Filter
Top Products
TMP92CZ26A
92CZ26A-193
(6) Adjust Function for the timing of control signal
This function can change the timing of
CSn
,
CSZx
,
CSXx
,R/
W
,
RD
,
WRxx
,
SRWR
and
SRxxB
signals and adjust the timing according to the set-up/hold time of the memories.
As for the
CSn
,
CSZx
,
CSXx
,R/
W
and
WRxx
,
SRWR
,
SRxxB
(at write cycle), it can be changed
for only 1 CS area. While for
RD
and
SRxxB
(at read cycle), it can be changed for all CS
areas. As for CS area and EX area which is not set this function, it operates with base bus
timing (Refer to (7)).
This can not be used together with BnCSH<BnREC> function.
For control signal of SDRAM, it can be adjusted in SDRAM controller.
CSTMGCR<TxxSEL1:0>, WRTMGCR<TxxSEL1:0>
00 Change the timing of CS0 area
01 Change the timing of CS1 area
10 Change the timing of CS2 area
11 Change the timing of CS3 area
CSTMGCR<TAC1:0>
00 TAC = 0 × f
SYS
(Default)
01 TAC = 1 × f
SYS
10 TAC = 2 × f
SYS
11 (Reserved)
TAC:The delay from (A23-0) to (CSn, CSZx, CSXx, R/W).
WRTMGCR<TCWS/H1:0>
00 TCWS/H = 0.5 × f
SYS
(Default)
01 TCWS/H = 1.5 × f
SYS
10 TCWS/H = 2.5 × f
SYS
11 TCWS/H = 3.5 × f
SYS
TCWS:The delay from (CSn) to (WRxx,SRWR,SRxxB).
TCWH:The delay from (WRxx,SRWR,SRxxB) to (CSn).
RDTMGCR0/1<BnTCRH1:0>
00 TCRH = 0 × f
SYS
(Default)
01 TCRH = 1 × f
SYS
10 TCRH = 2 × f
SYS
11 TCRH = 3 × f
SYS
TCRH:The delay from (RD,SRxxB) to (CSn).