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TMP92CZ26A
92CZ26A-375
• INT_STASN (Bit4)
This is a flag for INT_STASN (change host status stage - interrupt).
This is set to “1” when the USB host change to status stage at the Control
read transfer type. This interrupt is needed if data length is less than
wLength (specified by the host).
But if the USB host change to status stage, this interrupt is always
generated because of this signal is designed by using NAK of first packet. So,
to avoid that this interrupt always generate, use mask register USBINTMRn.
Disable this interrupt before data of last payload is written.
• INT_EPxN (Bit3, 2, 1)
This is a flag for INT_EPxN (NAK acknowledge to the USB host -
interrupt).
This is set to “1” when the Endpoint1, 2 and 3 transmit NAK.