Toshiba H1 Series Network Card User Manual


 
TMP92CZ26A
92CZ26A-314
3. Pulse width measurement
This mode allows measuring the H level width of an external pulse. While
keeping the 16 bit timer/event counter counting (free-running) with the
internal clock input, the external pulse is input through the TB0IN0 pin. Then
the capture function is used to load the UC10 values into TB0CP0H/L and
TB0CP1H/L at the rising edge and falling edge of the external trigger pulse
respectively. The interrupt INT6 occurs at the falling edge of TB0IN0.
The pulse width is obtained from the difference between the values of
TB0CP0H/L and TB0CP1H/L and the internal clock cycle.
For example, if the internal clock is 0.8[us] and the difference between
TB0CP0H/L and TB0CP1H/L is 100, the pulse width will be 100
× 0.8[us] =80us
Additionally, the pulse width which is over the UC10 maximum count time
specified by the clock source can be measured by changing software.
Figure 3.13.15 Pulse Width Measurement
Note: Only in this pulse width measuring mode(TB0MOD<TB0CPM1:0> “10”), external interrupt INT6 occurs at the
falling edge of TB0IN0 pin input. In other modes, it occurs at the rising edge.
The width of L level can be measured by multiplying the difference between the
first C1 and the second C0 at the second INT6 interrupt and the internal
clock cycle together.
C2
C1
C2
C1
C2
C1
Count clock
(Prescaler ouptut clock)
TB0IN0 pin input
(External pulse)
Loading to TB0CP0H/L
INT6
Loading to TB0CP1H/L