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TMP92CZ26A
92CZ26A-678
(1) I/O ports (1/11)
Symbol Name
Address 7 6 5 4 3 2 1 0
P17 P16 P15 P14 P13 P12 P11 P10
R/W
P1 PORT1 0004H
Data from external port (Output latch register is cleared to “0”)
P47 P46 P45 P44 P43 P42 P41 P40
R/W
P4 PORT4 0010H
0 0 0 0 0 0 0 0
P57 P56 P55 P54 P53 P52 P51 P50
R/W
P5 PORT5 0014H
0 0 0 0 0 0 0 0
P67 P66 P65 P64 P63 P62 P61 P60
R/W
P6 PORT6 0018H
Data from external port (Output latch register is cleared to “0”)
P76 P75 P74 P73 P72 P71 P70
R/W
P7 PORT7 001CH
Data from external
port (Output latch
register is set to “1”)
Data from external port
(Output latch register is
cleared to “0”)
Data from external port
(Output latch register is
set to “1”)
1
P87 P86 P85 P84 P83 P82 P81 P80
R/W
P8 PORT8 0020H
1 1 1 1 1 0 1 1
P97 P96 P92 P91 P90
R R/W
P9 PORT9 0024H
Data from external port
Data from external port
(Output latch register is set to “1”)
PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0
R
PA PORTA 0028H
Data from external port
PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
R/W
PC PORTC 0030H
Data from external port (Output latch register is set to “1”)
PF7 PF5 PF4 PF3 PF2 PF1 PF0
R/W
R/W
PF PORTF 003CH
1
Data from external port (Output latch register is set to “1”)
PG5 PG4 PG3 PG2 PG1 PG0
R
PG PORTG 0040H
Data from external port
PJ7 PJ6 PJ5 PJ4 PJ3 PJ2 PJ1 PJ0
R/W
PJ PORTJ 004CH
1
Data from external port
(Output latch register is
set to “1”)
1 1 1 1 1
PK7 PK6 PK5 PK4 PK3 PK2 PK1 PK0
R/W
PK PORTK 0050H
0 0 0 0 0 0 0 0
PL7 PL6 PL5 PL4 PL3 PL2 PL1 PL0
R/W
PL PORTL 0054H
0 0 0 0 0 0 0 0
PM7 PM2 PM1
R/W R/W
PM PORTM 0058H
1 1 1
PN7 PN6 PN5 PN4 PN3 PN2 PN1 PN0
R/W
PN PORTN 005CH
Data from external port (Output latch register is cleared to “1”)
PP7 PP6 PP5 PP4 PP3 PP2 PP1
R/W
PP PORTP 0060H
0 0
Data from external port
(Output latch register is cleared to “0”)