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TMP92CZ26A
92CZ26A-124
Port 6 register
7 6 5 4 3 2 1 0
bit Symbol P67 P66 P65 P64 P63 P62 P61 P60
Read/Write R/W
After reset Data from external port (Output latch register is cleared to “0”)
Port 6 Control register
7 6 5 4 3 2 1 0
bit Symbol P67C P66C P65C P64C P63C P62C P61C P60C
Read/Write W
After reset 0 0 0 0 0 0 0 0
Function 0:Input 1:Output
Port 6 Function register
7 6 5 4 3 2 1 0
bit Symbol P67F P66F P65F P64F P63F P62F P61F P60F
Read/Write W
After reset
Note2:
0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
Function
0: Port 1:Address bus (A16 to A23)
Port 6 Drive buffer register
7 6 5 4 3 2 1 0
bit Symbol P67D P66D P65D P64D P63D P62D P61D P60D
Read/Write
R/W
After reset 1 1 1 1 1 1 1 1
Function Input/Output buffer drive register for standby mode
Note: Read-modify-write is prohibited for P6CR, P6FC.
Note2: It is set to “Port” or “Data bus” by AM pins state.
Figure 3.7.8 Register for Port6
P6
(0018H)
P6FC
(001BH)
P6CR
(001AH)
P6DR
(0086H)