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TMP92CZ26A
92CZ26A-444
Below is transmitting sequence in single packet mode.
Figure 3.16.16 Transmitting Sequence in Single Packet Mode
Transmitting number < payload
• WR of transmitting number applicable endpoint
• Total = 0
Wait transmitting
rest data
Wait transmission event
IDLE
Transmitting number > payload
• WR of payload to applicable endpoint
• Total = Total − payload
Transmission event
DATASET = 1
DATASET register
• Check bit of EPx_DSET_A
Distinction
transmitting
EOP register
WR 0 to only bit of applicable endpoint
If transmitting number reach to
payload, applicable bit of
DATASET register is set 1
Wait transmitting
Finish
transmitting
If transmitting finish normally,
it clears applicable bit of DATASET.
Wait IN token
DATASET
=
0
•
Must access to EOP register in transmitting
short packet.
• This is used showing to the closing control
transfer type.
If you access to endpoint 0, you must to
access in closing control transfer type.