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Advanced Receive Descriptors — Intel
®
82575EB Gigabit Ethernet Controller
324632-003 Intel
®
82575EB Gigabit Ethernet Controller
Revision: 2.1 Software Developer’s Manual and EEPROM Guide
January 2011 109
If receive checksum offloading is disabled (RXCSUM.IPOFL & RXCSUM.TUOFL), the IPE and TCPE bits
are 0b.
In 1000BASE-T or 10/100BASE-T mode, the RXE bit indicates that a data error occurred during the
packet reception that has been detected by the PHY. This generally corresponds to signal errors
occurring during the packet reception. This bit is valid only when the EOP and DD bits are set and are
not set in descriptors unless RCTL.SBP bit is set. The RXE bit can also be set if a parity error was
discovered in the packet buffer while reading this packet. In this case, RXE can be set even if RCTL.SBP
is not set.
CRC errors and alignment errors are both indicated via the CE bit. The software device driver might
distinguish between these errors by monitoring the respective statistics registers.
5.3.3.5 VLAN Tag Field
Hardware stores additional information in the receive descriptor for 802.1q packets. If the packet type
is 802.1q (determined when a packet matches VET and RCTL.VME = 1b), then the VLAN Tag field
records the VLAN information and the four-byte VLAN information is stripped from the packet data
storage. Otherwise, the VLAN Tag field contains 0000h.
Table 30. VLAN Tag Field Layout for 802.1g Packets
5.3.4 Advanced Receive Descriptors
The 82575 uses the following receive descriptor.
Descriptor Read Format:
5.3.4.1 Packet Buffer Address
This field contains the physical address of the packet buffer. The the lowest bit is either A0 (LSB of
address) or No Snoop Enable (NSE), depending on bit RXCTL.RXdataWriteNSEn of the relevant queue.
5.3.4.2 Header Buffer Address
This field contains the physical address of the header buffer. The lowest bit is Descriptor Done (DD).
Note: The 82575 does not support Null Descriptors in which Packet or Header address is equal to
0b.
15 13 12 11 0
PRI CFI VLAN
63 10
0 Buffer Address [63:1] A0/
NSE
8 Header Buffer Address [63:1] DD