Intel
®
82575EB Gigabit Ethernet Controller — Signature and CRC Fields
Intel
®
82575EB Gigabit Ethernet Controller 324632-003
Software Developer’s Manual and EEPROM Guide Revision: 2.1
44 January 2011
Software can use the EEPROM Read register (EERD) to cause the 82575 to read a word from the
EEPROM that the software can then use. To do this, software writes the address to read into the Read
Address field (EERD.ADDR; bits 15:2) and simultaneously writes a 1b to the Start Read bit
(EERD.START; bit 0). The 82575 then reads the word from the EEPROM, sets the Read Done bit
(EERD.DONE; bit 1), and puts the data in the Read Data field (EERD.DATA; bits 31:16). Software can
poll the EEPROM Read register until it sees the Read Done bit set, then use the data from the Read Data
field. Any words read this way are not written to the 82575’s internal registers.
Software can also directly access the EEPROM’s 4-wire interface through the EEPROM/Flash Control
register (EEC). It can use this for reads, writes, or other EEPROM operations.
To directly access the EEPROM, software should follow these steps:
1. Write a 1b to the EEPROM Request bit (EEC.EE_REQ; bit 6).
2. Read the EEPROM Grant bit (EEC.EE_GNT; bit 7) until it becomes 1b. It remains 0b as long as the
hardware is accessing the EEPROM.
3. Write or read the EEPROM using the direct access to the 4-wire interface as defined in the EEPROM/
Flash Control & Data register (EEC). The exact protocol used depends on the EEPROM placed on the
board and can be found in the appropriate datasheet.
4. Write a 0b to the EEPROM Request bit (EEC.EE_REQ; bit 6).
Finally, software can cause the 82575 to re-read part of the hardware accessed fields of the EEPROM
(setting the 82575’s internal registers appropriately) by writing a 1b to the EEPROM Reset bit of the
Extended Device Control Register (CTRL_EXT.EE_RST; bit 13).
Note: If the EEPROM does not contain a valid signature, the 82575 assumes 16-bit addressing. In
order to access an EEPROM requiring 8-bit addressing, software must use the direct access
mode.
4.1.2 Signature and CRC Fields
The only way the 82575 can discover whether an EEPROM is present is by trying to read the EEPROM.
The 82575 first reads the EEPROM Sizing & Protected field Word at address 12h. The 82575 checks the
signature value for bits 15 and 14. If bit 15 is 0b and bit 14 is 1b, it considers the EEPROM to be
present and valid and reads additional EEPROM words and programs its internal registers based on the
values read. Otherwise, it ignores the values it read from that location and does not read any other
words.
4.1.3 EEPROM Recovery
The EEPROM contains fields that if programmed incorrectly might affect the functionality of 82575. The
impact can range from incorrectly setting a function like LED programming, disabling an entire feature
like no manageability or link disconnection, to the inability to access the 82575 via the regular PCIe*
interface.
The 825785 implements a mechanism that enables a recovery from a faulty EEPROM no matter what
the impact is by using an SMBus message that instructs the firmware to invalidate the EEPROM.