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82575EB Gigabit Ethernet Controller — Assumptions
Intel
®
82575EB Gigabit Ethernet Controller 324632-003
Software Developer’s Manual and EEPROM Guide Revision: 2.1
148 January 2011
5.8.1 Assumptions
The following assumption applies to the TCP Segmentation implementation in the 82575: The RS bit
operation is not changed. Interrupts are set after data in buffers pointed to by individual descriptors is
transferred to hardware.
5.8.2 Transmission Process
The transmission process for regular (non-TCP Segmentation packets) involves:
• The protocol stack receives from an application a block of data that is to be transmitted.
• The protocol stack calculates the number of packets required to transmit this block based on the
MTU size of the media and required packet headers.
• For each packet of the data block:
— Ethernet, IP and TCP/UDP headers are prepared by the stack.
— The stack interfaces with the software device driver and commands the driver to send the
individual packet.
— The software device driver gets the frame and interfaces with the hardware.
— The hardware reads the packet from host memory (via DMA transfers).
• The software device driver returns ownership of the packet to the operating system when the
hardware has completed the DMA transfer of the frame (indicated by an interrupt).
The transmission process for the 82575 TCP segmentation offload implementation involves:
• The protocol stack receives from an application a block of data that is to be transmitted.
• The stack interfaces to the software device driver and passes the block down with the appropriate
header information.
• The software device driver sets up the interface to the hardware (via descriptors) for the TCP
Segmentation context.
• The hardware transfers the packet data and performs the Ethernet packet segmentation and
transmission based on offset and payload length parameters in the TCP/IP context descriptor
including:
— Packet encapsulation
— Header generation and field updates including IPv4, IPv6 and TCP/UDP checksum generation
• The software device driver returns ownership of the block of data to the operating system when the
hardware has completed the DMA transfer of the entire data block (indicated by an interrupt).
5.8.2.1 TCP Segmentation Data Fetch Control
To perform TCP Segmentation in the 82575, DMA must be able to fit at least one packet of the
segmented payload into available space in the on-chip packet buffer. DMA does various comparisons
between the remaining payload and the packet buffer available space, fetching additional payload and
sending additional packets as space permits.
5.8.3 TCP Segmentation Performance
Performance improvements for a hardware implementation of TCP Segmentation offload mean: