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®
82575EB Gigabit Ethernet Controller
324632-003 Intel
®
82575EB Gigabit Ethernet Controller
Revision: 2.1 Software Developer’s Manual and EEPROM Guide
January 2011 13
14.1.1 Memory and I/O Address Decoding.......................................................................................289
14.1.1.1 Memory-Mapped Access to Internal Registers and Memories ..............................................289
14.1.1.2 Memory-Mapped Access to FLASH ..................................................................................289
14.1.1.3 Memory-Mapped Access to MSI-X Tables.........................................................................289
14.1.1.4 Memory-Mapped Access to Expansion ROM......................................................................290
14.1.2 I/O-Mapped Internal Register, Internal Memory, and Flash ......................................................290
14.1.2.1 IOADDR......................................................................................................................290
14.1.2.2 IODATA ......................................................................................................................291
14.1.2.3 Undefined I/O Offsets ...................................................................................................292
14.2 Register Summary................................................................................................................... 292
14.3 Main Register Descriptions........................................................................................................ 298
14.3.1 Device Control Register - CTRL (00000h; R/W).......................................................................299
14.3.2 Device Status Register - STATUS (00008h; R)........................................................................302
14.3.3 EEPROM/Flash Control Register - EEC (00010h; R/W)..............................................................303
14.3.4 EEPROM Read Register - EERD (00014h; RW) ........................................................................305
14.3.5 Extended Device Control Register - CTRL_EXT (00018h, R/W)..................................................306
14.3.6 Flash Access - FLA (0001Ch; R/W)........................................................................................309
14.3.7 MDI Control Register - MDIC (00020h; R/W)..........................................................................310
14.3.8 PHY Registers ....................................................................................................................311
14.3.8.1 PHY Control Register - PCTRL (00d; R/W)........................................................................312
14.3.8.2 PHY Status Register - PSTATUS (01d; R).........................................................................313
14.3.8.3 PHY Identifier Register 1 (LSB) - PHY ID 1 (02d; R) ..........................................................314
14.3.8.4 PHY Identifier Register 2 (MSB) - PHY ID 2 (03d; R) .........................................................314
14.3.8.5 Auto-Negotiation Advertisement Register - ANA (04d; R/W) ..............................................314
14.3.8.6 Auto-Negotiation Base Page Ability Register - (05d; R)......................................................315
14.3.8.7 Auto-Negotiation Expansion Register - ANE (06d; R).........................................................316
14.3.8.8 Auto-Negotiation Next Page Transmit Register - NPT (07d; R/W)........................................316
14.3.8.9 Auto-Negotiation Next Page Ability Register - LPN (08d; R)................................................317
14.3.8.10 1000BASE-T/100BASE-T2 Control Register - GCON (09d; R/W)..........................................317
14.3.8.11 1000BASE-T/100BASE-T2 Status Register - GSTATUS (10d; R)..........................................318
14.3.8.12 Extended Status Register - ESTATUS (15d; R) .................................................................319
14.3.8.13 Port Configuration Register - PCONF (16d; R/W) ..............................................................319
14.3.8.14 Port Status 1 Register - PSTAT (17d; RO)........................................................................320
14.3.8.15 Port Control Register - PCONT (18d; R/W).......................................................................321
14.3.8.16 Link Health Register - LINK (19d; RO) ............................................................................322
14.3.8.17 1000Base-T FIFO Register - PFIFO (20d; R/W).................................................................323
14.3.8.18 Channel Quality Register - CHAN (21d; RO).....................................................................324
14.3.8.19 PHY Power Management - (25d; R/W) ............................................................................324
14.3.8.20 Special Gigabit Disable Register - (26d; R/W) ..................................................................324
14.3.8.21 Misc Cntrl Register 1 - (27d; R/W) .................................................................................325
14.3.8.22 Misc Cntrl Register 2 - (28d; RO) ...................................................................................325
14.3.8.23 Page Select Core Register - (31d; WO) ...........................................................................326
14.3.9 SERDES ANA - SERDESCTL (00024h; R/W)............................................................................326
14.3.10 Copper/Fiber Switch Control - CONNSW (00034h; R/W) ..........................................................326
14.3.11 VLAN Ether Type - VET (00038h; R/W) .................................................................................327
14.3.12 Fuse Register - UFUSE (5B78h; RO)......................................................................................327
14.3.13 Flow Control Address Low - FCAL (00028h; R/W)....................................................................328
14.3.14 Flow Control Address High - FCAH (0002Ch; R/W) ..................................................................328
14.3.15 Flow Control Type - FCT (00030h; R/W) ................................................................................329
14.3.16 Flow Control Transmit Timer Value - FCTTV (00170h; R/W) .....................................................329
14.3.17 LED Control - LEDCTL (00E00h; RW) ....................................................................................329
14.3.17.1 MODE Encodings for LED Outputs...................................................................................330
14.3.18 Packet Buffer Allocation - PBA (01000h; R/W)........................................................................331
14.3.19 Packet Buffer Size - PBS (01008h; R/W)................................................................................332
14.3.20 SFP 12C Command - I2CCMD (01028h; R/W) ........................................................................332
14.3.21 SFP 12C Parameters - I2CPARAMS (0102Ch; R/W) .................................................................333
14.3.22 Flash Opcode - FLASHOP (0103Ch; R/W)...............................................................................334
14.3.23 EEPROM Diagnostic - EEDIAG (01038h; RO) ..........................................................................334
14.3.24 Manageability EEPROM Control Register - EEMNGCTL (01010h; RO) ..........................................335
14.3.25 Manageability EEPROM Read/Write Data - EEMNGDATA (1014h; RO).........................................336