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PCIe* Local Bus Interface — Intel
®
82575EB Gigabit Ethernet Controller
324632-003 Intel
®
82575EB Gigabit Ethernet Controller
Revision: 2.1 Software Developer’s Manual and EEPROM Guide
January 2011 173
6.0 PCIe* Local Bus Interface
This section describes the software interface and some related hardware aspects of PCIe* in regard to
the 82575.
6.1 General Functionality
• Native/Legacy Functionality. All 82575 PCI functions are native PCIe* functions.
• Locked Transactions. The 82575 does not support locked requests as a target or master.
• End to End CRC. This is not supported by the 82575.
6.1.1 Message Handling (Receive Side)
Message packets are special packets that carry message code. The upstream device transmits special
messages to the 82575 by using this mechanism. The transaction layer decodes the message code and
responds accordingly.
6.1.2 Message Handling (Transmit Side)
The transaction layer is also responsible for transmitting specific messages to report internal and
external events such as interrupts and power management events.
Table 50. Supported Messages on the Receive Side
Message Code
[7:0]
Routing r2r1r0 Name Device Response
14h 100 PM_Active_State_NAK Stop ASPM L1 negotiation and go
back to L0
19h 011 PME_Turn_Off Send PME_to_Ack and start L2
negotiation
50h 100 Slot power limited support (one Dword) Silently drop
7Eh 010,011,100 Vendor_Defined Type 0 (no data) Unsupported request
7Eh 010,011,100 Vendor_Defined Type 0 (data) Unsupported request
7Fh 010,011,100 Vendor_Defined Type 1 (no data) Silently drop
7Fh 010,011,100 Vendor_Defined Type 1 (data) Silently drop
00h 011 Unlock Silently drop