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Intel
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82575EB Gigabit Ethernet Controller — Flow Control
Intel
®
82575EB Gigabit Ethernet Controller 324632-003
Software Developer’s Manual and EEPROM Guide Revision: 2.1
252 January 2011
Flow control is implemented as a means of reducing the possibility of receive buffer overflows which
result in the dropping of received packets, and allows for local control of network congestion levels. This
can be accomplished by sending an indication to a transmitting station of a nearly-full receive buffer
condition at a receiving station.
The implementation of asymmetric flow control allows for one link partner to send flow control packets
while being allowed to ignore their reception. For example, not required to respond to PAUSE frames.
9.3.4.1 MAC Control Frames and Reception of Flow Control
Packets
Three comparisons are used to determine the validity of a flow control frame:
1. A match on the 6-byte multicast address for MAC Control Frames or to the station address of the
device (Receive Address Register 0).
2. A match on the type field.
3. A comparison of the MAC Control Opcode field.
Standard 802.3x defines the MAC Control Frame multicast address as 01_80_C2_00_00_01h. This
address must be loaded into the Flow Control Address Low/High registers (FCAL/H).
The Flow Control Type register (FCT) contains a 16-bit field that is compared against the flow control
packet’s type field to determine if it is a valid flow control packet: XON or XOFF. 802.3x reserves this
value as 8808h. This number must be loaded into the Flow Control Type (FCT) register.
The final check for a valid PAUSE frame is the MAC Control Opcode. At this time only the PAUSE control
frame opcode is defined. It has a value of 0001h.
Frame based flow control differentiates XOFF from XON based on the value of the PAUSE timer field.
Non-zero values constitute XOFF frames while a value of zero constitutes an XON frame. Values in the
timer field are in units of slot time. A “slot time” is hard wired to a 64-byte time or 512-bit time.
Note: An XON frame signals a pause cancellation from being initiated by an XOFF frame (Pause
for zero slot times).
Flow Control Receive Thresh Lo (FCRTL) 13-bit low water mark indicating receive buffer emptiness
Flow Control Transmit Timer Value (FCTTV) 16 bit timer value to include in transmitted PAUSE frame
Flow Control Refresh Threshold Value (FCRTV) 16-bit PAUSE refresh threshold value
Table 80. Flow Control Registers