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82575EB Gigabit Ethernet Controller — Multiple Receive Queues & Receive-Side Scaling
(RSS)
Intel
®
82575EB Gigabit Ethernet Controller 324632-003
Software Developer’s Manual and EEPROM Guide Revision: 2.1
122 January 2011
5.4.2 Multiple Receive Queues & Receive-Side Scaling
(RSS)
The 82575 provides four hardware receive queues and filters each receive packet into one of the
queues based on criteria described in the sections that follow. Classification of packets into receive
queues have several uses such as Receive Side Scaling (RSS), generic Multiple receive queues, or
Priority receive queues. However, RSS is the only usage that is described specifically. Other uses should
make use of the available hardware.
Multiple Receive Queues are enabled when the RXCSUM.PCSD bit is set (Packet Checksum is disabled)
and the Multiple Receive Queues Enable bits are not set to 00b. Multiple Receive Queues are therefore
mutually exclusive with UDP fragmentation. Also, support for multiple queues is not provided when
legacy receive descriptor format is used.
When Multiple Receive Queues are enabled, the 82575 provides software with several types of
information. Some are requirements of RSS while other are provided for device driver assistance:
• A Dword result of the RSS hash function. This is used by the stack for flow classification and is
written into the receive packet descriptor (required by RSS).
• A 4-bit RSS Type field. This conveys the hash function used for the specific packet (required by
RSS).
The following summarizes the process of classifying a packet into a receive queue:
1. The receive packet is parsed into the header fields used by the hash operation (for example, IP
addresses, TCP/UDP port, etc.)
2. A hash calculation is performed. The 82575 supports a single hash function as defined by RSS. The
82575 does not indicate to the device driver which hash function is used. The 32-bit result is fed
into the receive packet descriptor.
3. The seven LSBs of the hash result are used as an index into a 128-entry Redirection Table. Each
entry provides a 2-bit Queue number that indicates the queue into which the packet should be
routed.
When multiple receive queues are disabled, packets enter hardware queue 0. System software can
enable or disable RSS at any time. While disabled, system software can update the contents of any of
the RSS-related registers. While RSS is enabled, software can update the Indirection Table at any time.
When multiple request queues are enabled in RSS mode, un-decodable packets enter hardware queue
0. The 32-bit tag (normally a result of the hash function) equals 0b.
5.4.2.1 RSS Hash Function
A single hash function is defined with six variations for the following cases:
• IPv4. The 82575 parses the packet and uses the IPv4 source and destination addresses to generate
the hash value.
• TCP/IPv4. The 82575 parses the packet to identify an IPv4 packet containing a TCP segment. The
82575 uses the IPv4 source and destination addresses and the TCP local and remote port values to
generate the hash value.
• IPv6. The 82575 parses the packet to identify an IPv6 packet and uses the IPv6 source and
destination addresses to generate the hash value.
• TCP/IPv6. The 82575 parses the packet to identify an IPv6 packet containing a TCP segment. The
82575 uses the IPv6 source and destination addresses and the TCP local and remote port values to
generate the hash value.