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PCI Power Management Registers — Intel
®
82575EB Gigabit Ethernet Controller
324632-003 Intel
®
82575EB Gigabit Ethernet Controller
Revision: 2.1 Software Developer’s Manual and EEPROM Guide
January 2011 209
Device Control 2
Device Control 2 is 2 bytes at offset C8h. This register controls PCIe* specific parameters. It has the
same value for the two LAN functions.
Bit(s) RD/WR Default Description
15:5 RO 0h Reserved
4 RO 1b Completion Timeout Disable Supported
A value of 1b indicates support for the Completion Timeout Disable mechanism.
3:0 RO 1111b Completion Timeout Ranges Supported
This field indicates 82575 support for the optional Completion Timeout programmability
mechanism. This mechanism enables system software to modify the Completion Timeout value.
Four time value ranges are defined:
Range A: 50 s to 10 ms
Range B: 10 ms to 250 ms
Range C: 250 ms to 4 s
Range D: 4 s to 64 s
Bits are set as follows to show the timeout value ranges supported.
0000b = Completion Timeout programming not supported - the 82575 must implement a
timeout value in the range 50 s to 50 ms.
0001b = Range A
0010b = Range B
0011b = Ranges A & B
0110b = Ranges B & C
0111b = Ranges A, B & C
1110b = Ranges B, C & D
1111b =Ranges A, B, C & D
All other values are reserved.
It is strongly recommended that the Completion Timeout mechanism not expire in less than 10
ms.